The inventive concepts described herein are generally related to an internal source voltage generating circuit of a semiconductor memory device, and more particularly to an internal source voltage generating circuit of a semiconductor memory device in which a malfunction is prevented by rapidly restoring a stable internal source voltage when a voltage of an internal source voltage node abruptly drops due to operation of internal circuits.
In general, semiconductor memory devices require a low internal operation voltage. Accordingly, such semiconductor memory devices typically convert a high external voltage into a low internal voltage, and the low internal voltage is used as the internal operation voltage of the device. Semiconductor memory devices operate reliably when the internal source voltage generated from an external source voltage VDD stabilizes a predetermined time after the external source voltage is applied. Since the internal source voltage is used as a source voltage for main internal circuits which affect the performance of semiconductor memory devices, such as peripheral logic circuits or memory cell arrays, a stable constant voltage source is thus a necessity.
In particular, semiconductor memory devices employed in portable electronics include both a standby internal source voltage generating circuit which always operates when an external source voltage is applied, and an active internal source voltage generating circuit which operates only during an active mode.
Since current consumption is high in the active mode, the active internal source voltage generating circuit must have a large current driving ability and high response speed. Since current consumption is low in the standby mode, the standby internal source voltage generating circuit has a small current driving ability and slow response speed.